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SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
5.3.3
5.3.4
5.3.5
5.3.6
Power-Supply Design Considerations
Core and I/O supply voltage regulators should be located close to the DSP (or DSP array) to minimize
inductance and resistance in the power delivery path. Additionally, when designing for high-performance
applications utilizing the device, the PC board should include separate power planes for core, I/O,
V DDA_ANA and V DDA_PLL (which can share the same PCB power plane), and ground; all bypassed with
high–quality low–ESL/ESR capacitors.
Power-Supply Decoupling
In order to properly decouple the supply planes from system noise, place capacitors (caps) as close as
possible to the device. These caps need to be no more than 1.25 cm maximum distance from the device
power pins to be effective. Physically smaller caps, such as 0402, are better but need to be evaluated
from a yield/manufacturing point-of-view. Parasitic inductance limits the effectiveness of the decoupling
capacitors, therefore physically smaller capacitors should be used while maintaining the largest available
capacitance value.
Larger caps for each supply can be placed further away for bulk decoupling. Large bulk caps (on the order
of 10 μ F) should be furthest away, but still as close as possible. Large caps for each supply should be
placed outside of the BGA footprint.
As with the selection of any component, verification of capacitor availability over the product's production
lifetime should be considered.
The recommended decoupling capacitance for the DSP core supplies should be 1 μ F in parallel with 0.01-
μ F capacitor per supply pin.
LDO Input Decoupling
The LDO inputs should follow the same decoupling guidelines as other power-supply pins above.
LDO Output Decoupling
The LDO circuits implement a voltage feedback control system which has been designed to optimize gain
and stability tradeoffs. As such, there are design assumptions for the amount of capacitance on the LDO
outputs. For proper device operation, the following external decoupling capacitors should be used when
the on-chip LDOs are enabled:
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?
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ANA_LDOO– 1 μ F
DSP_LDOO – 5 μ F ~ 10 μ F
USB_LDOO – 1 μ F ~ 2 μ F
Copyright ? 2010–2013, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
Product Folder Links: TMS320C5515
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